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Si9185
Vishay Siliconix
Micropower 500-mA CMOS LDO Regulator With Error Flag/Power-On-Reset
FEATURES
D D D D D D D D D D Input Voltage 2 V to 6 V Low 150-mV Dropout at 500-mA Load Guaranteed 500-mA Output Current Uses Low ESR Ceramic Output Capacitor Fast Load and Line Transient Response Only 100-mV(rms) Noise With Noise Bypass Capacitor 1-mA Maximum Shutdown Current Built-in Short Circuit and Thermal Protection Out-Of-Regulation Error Flag (Power Good or POR) Fixed 1.215-V, 1.5-V, 1.8-V, 2.0-V, 2.5-V, 2.8-V, 2.9-V, 3.0-V, 3.3-V, 5.0-V, or Adjustable Output Voltage Options D Other Output Voltages Available by Special Order D 1.1-W Power Dissipation D Thin, Thermally Enhanced MLP33 PowerPAKt Package
APPLICATIONS
D D D D Laptop and Palm Computers Desktop Computers Cellular Phones PDA, Digital Still Cameras
DESCRIPTION
The Si9185 is a 500-mA CMOS LDO (low dropout) voltage regulator. The device features ultra low ground current and dropout voltage to prolong battery life in portable electronics. The Si9185 offers line/load transient response and ripple rejection superior to that of bipolar or BiCMOS LDO regulators, and is designed to drive lower cost ceramic, as well as tantalum, output capacitors. An external noise bypass capacitor connected to the device's CNOISE pin will lower the LDO's output noise for low noise applications. The Si9185 also includes an out-of-regulation error flag. If a capacitor is connected to the device's delay pin, the error flag output pin will generate a delayed power-on-reset signal. The device is guaranteed stable from maximum load current down to 0-mA load.
The Si9185 is available in a MLP33 PowerPAK package. This allows enhanced heat transfer to the PC board. The Si9185 is specified to operate over the industrial temperature range of -40_C to +85_C.
TYPICAL APPLICATIONS CIRCUITS
1 2 3 VIN 2.2 mF GND 4 8 7 6 5 2.2 mF 1 2 3 VIN 2.2 mF GND 4 8 7 6 5
CNOISE DELAY GND VIN
SD ERROR SENSE/ADJ VOUT
CNOISE DELAY GND VIN
SD ERROR
VOUT
SENSE/ADJ VOUT
VOUT 2.2 mF
Si9185
Si9185
FIGURE 1. Fixed Output
1 2 0.1 mF 3 4 CNOISE DELAY GND VIN SD ERROR SENSE/ADJ VOUT 8 7 6 5
FIGURE 2. Adjustable Output
ON/OFF POR 1 MW VOUT
0.1 mF
VIN 2.2 mF GND
Si9185
2.2 mF
FIGURE 3. Low Noise, Full Features Application
Document Number: 71765 S-20641--Rev. B, 06-May-02 www.vishay.com
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Si9185
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V SD Input Voltage, VSD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VIN Output Current, IOUT . . . . . . . . 500 mA Continuous, Short Circuit Protected Output Voltage, VOUT . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to VO(nom) + 0.3 V Maximum Junction Temperature, TJ(max) . . . . . . . . . . . . . . . . . . . . . . . 150_C Storage Temperature, TSTG . . . . . . . . . . . . . . . . . . . . . . . . . . -55_C to 150_C ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV Power Dissipationb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 W Thermal Impedance (QJA)a (RQ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50_C/W JA (RQ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4_C/W Jc Notes a. Device mounted with all leads soldered or welded to PC board. (PC board--2" x 2", 4-layer, FR4, 0.25 square inch spreading copper) b. Derate 20 mW/_C above TA = 25_C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 V to 6 V Output Voltage, VOUT (Adjustable Version) . . . . . . . . . . . . . . . 1.215 V to 5 V R2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 kW to 150 kW CIN = 2.2 mF, COUT = 2.2 mF (ceramic, X5R or X7R type) , CNOISE = 0.1 mF (ceramic) COUT Range = 1 mF to 10 mF ("10%, x5R or x7R type) CIN w COUT Operating Ambient Temperature, TA . . . . . . . . . . . . . . . . . . . . -40_C to 85_C Operating Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . -40_C to 125_C
SPECIFICATIONS
Test Conditions Unless Otherwise Specified Parameter Symbol
VIN = VOUT(nom) + 1 V, IOUT = 1 mA CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Limits
-40 to 85_C
Tempa
Minb
Typc
Maxb
Unit
Output Voltage Range Output Voltage Accuracy (Fixed Versions) Feedback Voltage (ADJ Version) VOUT
Adjustable Version 1 mA v IOUT v 500 mA
Full Room Full Room
1.215 -1.5 -2.5 1.191 1.179 1.215
5 1.5 2.5 1.239 1.251
V % VO(nom)
VADJ
Full From VIN = VOUT + 1 V to VOUT + 2 V
V
Line Regulation (VADJ v VOUT v 4 V)
Full
-0.18
0.18 %/V
DVOUT V IN
100 VOUT
Line Regulation (4 V VOUT v 5 V)
From VIN = 5.5 V to 6 V
Full
-0.18
0.18
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Document Number: 71765 S-20641--Rev. B, 06-May-02
Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Otherwise Specified Parameter Symbol
VIN = VOUT(nom) + 1 V, IOUT = 1 mA CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V
Limits
-40 to 85_C
Tempa
Room Room Room
Minb
Typc
5 145 320
Maxb
20 215 480 600
Unit
IOUT = 10 mA Dropout Voltaged (@VOUT(nom) w 2 V) VIN - VOUT Dropout Voltaged (@VOUT(nom) w 2.5 V) IOUT = 200 mA IOUT = 500 mA IOUT = 200 mA IOUT = 500 mA IOUT = 200 mA Dropout Voltaged (@VOUT(nom) w 3.3 V) VIN - VOUT IOUT = 500 mA IOUT = 200 mA Dropout Voltaged (@VOUT(nom) w 5 V) VIN - VOUT IOUT = 500 mA IOUT = 200 mA Dropout Voltaged (@VOUT(nom) t 2 V, VIN w 2 V) VIN - VOUT IOUT = 500 mA IOUT = 0 mA IOUT = 200 mA
Full Room Room Full Room Room Full Room Room Full Room Room Full Room Room 150 1000 170 415 60 150 90 200 115 250
175 400 480 135 300 400 100 210 300 250 625 825 mV
Ground Pin Current
IGND
Full Room 2500
1500
m mA
IOUT = 500 mA Shutdown Supply Current ADJ Pin Current Peak Output Current Output Noise Voltage IIN(off) IADJ IO(peak) eN VSD = 0 V ADJ = 1.2 V VOUT w 0.95 x VOUT(nom), tpw = 2 ms BW = 50 Hz to 100 kHz IOUT = 150 mA w/o CNOISE CNOISE = 0.1 mF f = 1 kHz Ripple Rejection DVOUT/DVIN IOUT = 150 mA f = 10 kHz f = 100 kHz Dynamic Line Regulation Dynamic Load Regulation VOUT Turn-On-Time DVO(line) DVO(load) tON VIN : VOUT(nom) + 1 V to VOUT(nom) + 2 V tR/tF = 5 ms, IOUT = 500 mA IOUT : 1 mA to 150 mA, tR/tF = 2 ms VIN = 4.3 V VOUT = 3.3 V w/o CNOISE Cap CNOISE = 0.1 mF
Full Room Room Room Room Room Room Room Room Room Room Room Room 600 200 100 60 60 40 10 0.1 5
4000 1 100 mA nA mA mV m (rms)
dB
mV 30 5 2 ms mS
Thermal Shutdown
Thermal Shutdown Junction Temp Thermal Hysteresis Short Circuit Current tJ(s/d) tHYST ISC VOUT = 0 V Room Room Room 165 20 800 _C _ mA
Shutdown Input
VIH SD Input Voltage VIL High = Regulator ON (Rising) Low = Regulator OFF (Falling) Full Full 1.5 VIN 0.4 V
Document Number: 71765 S-20641--Rev. B, 06-May-02
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Si9185
Vishay Siliconix
SPECIFICATIONS
Test Conditions Unless Otherwise Specified Parameter
SD Input Currente Shutdown Hysteresis
Limits
-40 to 85_C
Symbol
IIH IIL VHYST
VIN = VOUT(nom) + 1 V, IOUT = 1 mA CIN = 2.2 mF, COUT = 2.2 mF, VSD = 1.5 V VSD = 0 V, Regulator OFF VSD = 6 V, Regulator ON
Tempa
Room Room Full
Minb
Typc
0.01 1.0 100
Maxb
Unit
mA m mV
Error Output
Output High Leakage Output Low Voltageg IOFF VOL VTH VHYST IDELAY ERROR = VOUT(nom) ISINK = 2 mA Full Full Full Room Room 1.2 0.93 x VOUT 0.95 x VOUT 2% x VOUT 2.2 3.0 mA 0.01 2 0.4 0.97 x VOUT V mA
Out-of-Regulation Error Flag Threshold Voltage (rising) g Hysteresis g Delay Pin Current Source
Notes a. Room = 25_C, Full = -40 to 85_C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 V. d. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the output voltage measured with a 1-V differential, provided that VIN does not not drop below 2.0 V. When VOUT(nom) is less than 2.0 V, the output will be in regulation when 2.0 V - VOUT(nom) is greater than the dropout voltage specified. e. The device's shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground. f. VOUT is defined as the output voltage of the DUT at 1 mA. g. The Error Output (Low) function is guaranteed for VIN w2.0 V.
TIMING WAVEFORMS
VIN
tON VNOM 0.95 VNOM VOUT
ERROR
tDELAY
FIGURE 4. Timing Diagram for Power-Up
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Document Number: 71765 S-20641--Rev. B, 06-May-02
Si9185
Vishay Siliconix
PIN CONFIGURATION
MLP33 PowerPAK
MLP33 PowerPAK
CNOISE DELAY GND VIN
1 2 3 4
8 7 6 5
SD ERROR SENSE or ADJ VOUT
SD ERROR SENSE or ADJ VOUT
8 7 6 5
1 2 3 4
CNOISE DELAY GND VIN
Exposed Pad Top View Bottom View
PIN DESCRIPTION
Pin Number
1 2 3 4 5 6 7 8
Name
CNOISE DELAY GND VIN VOUT SENSE or ADJ ERROR SD Exposed Pad
Function
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin to ground. Capacitor connected from this pin to ground will allow a delayed power-on-reset signal at the ERROR (Pin 7) output. Refer to Figure 4. Ground pin. Local ground for CNOISE and COUT. Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground. Output voltage. Connect COUT between this pin and ground. For fixed output voltage versions, this pin should be connected to VOUT (Pin 5). For adjustable output voltage version, this voltage feedback pin sets the output voltage via an external resistor divider. This open drain output is an error flag output which goes low when VOUT drops 5% below its nominal voltage. This pin also provides a power-on-reset signal if a capacitor is connected to the DELAY pin. By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to VIN if unused. The die substrate is attached to the exposed pad and must be electrically connected to GND.
ORDERING INFORMATION
Part Number
Si9185DMP-12-T1 Si9185DMP-15-T1 Si9185DMP-18-T1 Si9185DMP-20-T1 Si9185DMP-25-T1 Si9185DMP-28-T1 Si9185DMP-29-T1 Si9185DMP-30-T1 Si9185DMP-33-T1 Si9185DMP-50-T1
Marking
8512 8515 8518 8520 8525 8528 8529 8530 8533 8550
Voltage
1.215 V 1.50 V 1.80 V 2.00 V 2.50 V 2.80 V 2.90 V 3.00 V 3.30 V 5.00 V
Temperature
Package
-40 to 85_C 85 C
MLP33 PowerPAK
SI9185DMP-AD-T1 85AD Adjustable Additional voltage options are available.
Eval Kit
Si9185DB Document Number: 71765 S-20641--Rev. B, 06-May-02
Temperature Range
-40 to 85_C
Board Type
Surface Mount www.vishay.com
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Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
300 VOUT = 3.0 V 3.5 3.0 RLOAD = 16.5 W 2.5 V DROP (mV) 200 V OUT (V) 2.0 1.5 1.0 50 0.5 0.0 0 100 200 300 ILOAD (mA) 400 500 600 0 1 2 3 VIN (V) 4 5 6
Dropout Characteristic
250
150
100
0
Dropout Voltage vs. Temperature
300 IOUT = 500 mA 250 Dropout Voltage (mV) VOUT = 3.0 V 200 V DROP (mV) 400 350 300 250 200 150 100 50 50 0 -50 IOUT = 10 mA IOUT = 0 mA -25 0 25 50 75 100 125 150 Junction Temperature (_C) 0 1.0
Dropout Voltage vs. VOUT
IOUT = 500 mA
150 IOUT = 200 mA
IOUT = 200 mA
100
IOUT = 10 mA 1.5 2.0 2.5 3.0 VOUT 3.5 4.0 4.5 5.0
Normalized Output Voltage vs. Load Current
0.30 0.15 0.00 -0.2 -0.15 -0.30 -0.45 -0.60 -0.75 0 50 100 150 200 250 300 350 400 450 500 Load Current (mA) -0.8 V OUT (%) 0.2
Normalized VOUT vs. Temperature
IOUT = 1 mA -0.0
Output Voltage (%)
-0.4
IOUT = 200 mA IOUT = 500 mA
-0.6
-1.0 -40
-20
0
20
40
60
80
100
120
140
Junction Temperature (_C)
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Document Number: 71765 S-20641--Rev. B, 06-May-02
Si9185
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
GND Current vs. Load Current
0.0 VOUT = 5 V -0.5 250 300
No Load GND Pin Current vs. Input Voltage
200 I GND ( mA) I GND ( mA) -1.0 25_C -1.5 85_C 150 25_C 100 -2.0 -40_C 50
-2.5 0 50 100 150 200 250 300 350 400 450 500 Load Current (mA)
0 0 1 2 3 4 5 6 7 Input Voltage (V)
Power Supply Rejection
0 CIN = 10 mF COUT = 2.2 mF ILOAD = 150 mA -20 I GND ( mA) 1500 2500
GND Pin Current vs. Temperature and Load
IOUT = 500 mA 2000 VOUT = 5 V
Gain (dB)
-40
IOUT = 200 mA 1000
-60 500 IOUT = 0 mA -80 10 100 1000 10000 100000 1000000 Frequency (Hz) 0 -40
-20
0
20
40
60
80
100
120
140
JunctionTemperature (_C)
Document Number: 71765 S-20641--Rev. B, 06-May-02
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Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
Load Transient Response-1 Load Transient Response-2
VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF VOUT = 3.3 V, COUT = 2.2 mF ILOAD = 1 to 150 mA trise = 2 msec
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF VOUT = 3.3 V, COUT = 2.2 mF ILOAD = 1 to 150 mA trise = 2 msec
Load Transient Response-3
Load Transient Response-4
VOUT 10 mV/div VOUT 10 mV/div ILOAD 100 mA/div ILOAD 100 mA/div
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF VOUT = 3.3 V, COUT = 1.0 mF ILOAD = 1 to 150 mA trise = 2 msec
5.00 ms/div
VIN = 4.3 V, CIN = 2.2 mF VOUT = 3.3 V, COUT = 1.0 mF ILOAD = 1 to 150 mA trise = 2 msec
Load Transient Response-5
Load Transient Respons-6
VOUT 20 mV/div
VOUT 20 mV/div
ILOAD 200 mA/div
ILOAD 200 mA/div
10 ms/div
VIN = 4.3 V, CIN = 10 mF VOUT = 3.3 V, COUT = 10 mF ILOAD = 1 to 500 mA trise = 2 msec
10 ms/div
VIN = 4.3 V, CIN = 10 mF VOUT = 3.3 V, COUT = 10 mF ILOAD = 1 to 500 mA trise = 2 msec
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Document Number: 71765 S-20641--Rev. B, 06-May-02
Si9185
Vishay Siliconix
TYPICAL WAVEFORMS
Line Transient Response-1
VOUT 1 V/div VIN 2 V/div
Line Transient Respons-2
VOUT 10 mV/div
5.00 ms/div
VINSTEP = 4.3 to 5.3 V VOUT = 3.3 V COUT = 2.2 mF CIN = 10 mF ILOAD = 500 mA trise = 5 msec
5.00 ms/div
VINSTEP = 5.3 to 4.3 V VOUT = 3.3 V COUT = 2.2 mF CIN = 10 mF ILOAD = 500 mA tfall = 5 msec
Turn-On Sequence
Turn-Off Sequence
VIN CH-3 2 V/div VIN 2 V/div VOUT 2 V/div VOUT CH-1 2 V/div
Cdelay 2 V/div ERROR 2 V/div
Cdelay CH-4 2 V/div ERROR CH-2 2 V/div VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 mF CNOISE = 0.1 mF ILOAD = 350 mA 5.00 ms/div VIN = 4.2 V VOUT = 3.3 V Cdelay = 0.1 mF CNOISE = 0.1 mF ILOAD = 350 mA
10.00 ms/div
Output Noise
10.0
Noise Spectrum
mV 500 mV/div
Hz
0.01 1 ms/div VIN = 4.2 V VOUT = 3.3 V IOUT = 150 mA CNOISE = 0.1 mF BW = 10 Hz to 1 MHz 100 Hz VIN = 4.1 V VOUT = 3.3 V/10 mA CNOISE = 0.1 mF 1 MHz
Document Number: 71765 S-20641--Rev. B, 06-May-02
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Si9185
Vishay Siliconix
BLOCK DIAGRAM
SENSE 6 VIN 4 CNOISE 1
8 SD
RFB2
+ - 60 mV 2 mA
To VIN
5 VOUT
6 MW RFB1 +
+ -
2 DELAY 7 ERROR
+ 3 GND 1.215 V VREF -
- +
FIGURE 5.
DETAILED DESCRIPTION
The Si9185 is a low drop out, low quiescent current, and very linear regulator family with very fast transient response. It is primarily designed for battery powered applications where battery run time is at a premium. The low quiescent current allows extended standby time while low drop out voltage enables the system to fully utilize battery power before recharge. The Si9185 is a very fast regulator with bandwidth exceeding 50 kHz while maintaining low quiescent current at light load conditions. With this bandwidth, the Si9185 is the fastest LDO available today. The Si9185 is stable with any output capacitor type from 1 mF to 10.0 mF. However, X5R or X7R ceramic capacitors are recommended for best output noise and transient performance. VIN VIN is the input supply pin. The bypass capacitor for this pin is not critical as long as the input supply has low enough source impedance. For practical circuits, a 1.0-mF or larger ceramic capacitor is recommended. When the source impedance is not low enough and/or the source is several inches from the Si9185, then a larger input bypass capacitor is needed. It is required that the equivalent impedance (source impedance, wire, and trace impedance in parallel with input bypass capacitor impedance) must be smaller than the input impedance of the Si9185 for stable operation. When the source impedance, wire, and trace impedance are unknown, it is recommended that an input bypass capacitor be used of a value that is equal to or greater than the output capacitor. VOUT VOUT is the output voltage of the regulator. Connect a bypass capacitor from VOUT to ground. The output capacitor can be any value from 1.0 mF to 10.0 mF. A ceramic capacitor with X5R or X7R dielectric type is recommended for best output noise, line transient, and load transient performance. GND Ground is the common ground connection for VIN and VOUT. It is also the local ground connection for CNOISE, DELAY, SENSE or ADJ, and SD.
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Document Number: 71765 S-20641--Rev. B, 06-May-02
Si9185
Vishay Siliconix
SENSE or ADJ SENSE is used to sense the output voltage. Connect SENSE to VOUT for the fixed voltage version. For the adjustable output version, use a resistor divider R1 and R2, connect R1 from VOUT to ADJ and R2 from ADJ to ground. R2 should be in the 25-kW to 150-kW range for low power consumption, while maintaining adequate noise immunity. The formula below calculates the value of R1, given the desired output voltage and the R2 value,
R1 + V OUT * VADJ R2 VADJ (1)
Safe Operating Area The ability of the Si9185 to supply current is ultimately dependent on the junction temperature of the pass device. Junction temperature is in turn dependent on power dissipation in the pass device, the thermal resistance of the package and the circuit board, and the ambient temperature. The power dissipation is defined as PD = (VIN - VOUT) * IOUT . Junction temperature is defined as TJ = TA + ((PD * (RJC + RCA)). To calculate the limits of performance, these equations must be rewritten. Allowable power dissipation is calculated using the equation PD = (TJ - TA )/ (RJC + RCA) While allowable output current is calculated using the equation IOUT = (TJ - TA )/ (RJC + RCA) * (VIN - VOUT). Ratings of the Si9185 that must be observed are TJmax = 125 _C, TAmax = 85 _C, (VIN - VOUT)max = 5.3 V, RJC = 4 _C/W. The value of RCA is dependent on the PC board used. The value of RCA for the board used in device characterization is approximately 46 _C/W. Figure 6 shows the performance limits graphically for the Si9185 mounted on the circuit board used for thermal characterization.
VADJ is nominally 1.215 V.
SHUTDOWN (SD) SD controls the turning on and off of the Si9185. VOUT is guaranteed to be on when the SD pin voltage equals or is greater than 1.5 V. VOUT is guaranteed to be off when theSD pin voltage equals or is less than 0.4 V. During shutdown mode, the Si9185 will draw less than 2-mA current from the source. To automatically turn on VOUT whenever the input is applied, tie the SD pin to VIN. ERROR ERROR is an open drain output that goes low when VOUT is less than 5% of its normal value. As with any open drain output, an external pull up resistor is needed. When a capacitor is connected from DELAY to GROUND, the error signal transition from low to high is delayed (see Delay section). This delayed error signal can be used as the power-on reset signal for the application system. (Refer to Figure 4.) The ERROR pin is disconnected if not used.
0.6
DELAY
0.5
I OUT (A)
A capacitor from DELAY to GROUND sets the time delay for ERROR going from low to high state. The time delay can be calculated using the following formula:
Tdelay + VADJ Cdelay Idelay (2)
TA = 0_C 0.4 TA = 25_C 0.3 TA = 50_C 0.2 TA = 70_C TA = 85_C 0.1 (VIN - VOUT)MAX = 5.3 V
The DELAY pin should be an open circuit if not used. CNOISE For low noise application, connect a high frequency ceramic capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R or X7R is recommended.
Document Number: 71765 S-20641--Rev. B, 06-May-02
0.0 0 1 2 3 VIN - VOUT (V) 4 5 6
Figure 6.
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Si9185
Vishay Siliconix
PCB Footprint and Layout Considerations The Si9185 comes in the MLP33 PowerPAK package with an exposed pad on the bottom to provide a low thermal impedance path into the PC board. When the PC board layout is designed, a copper plane, referred to as spreading copper, is recommended to be placed under the package to which the exposed pad is soldered. This spreading copper is the path for the heat to move away from the package into the PC board. With the Si9185 mounted on a four layer board measuring 2" 2", a spreading copper area of 0.25 square inches will yield an Rqja of 50_C/W. This allows for power dissipation in excess of 1 watt in an 80_C ambient environment.
0.906 0.026
1.425 0.056
0.650 0.026
0.325 0.013
2.245 0.088
0.396 0.016 1.426 0.056 2.852 0.112 mm inches
Figure 7. MLP33 PowerPAK Pad Pattern
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Document Number: 71765 S-20641--Rev. B, 06-May-02

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